In recent years, the processing performance required for semiconductor devices such as LSI has become severer along with the progress of information communication equipment and it has been attempted to increase the operation speed of transistors. In particular, complementary field effect transistors comprising an n-type channel field effect transistor and a p-type channel field effect transistor have been used generally since they consume less electric power. Its operation speed has been increased mainly by the refinement of the structure being supported by the progress of lithography for fabricating semiconductor devices. However, the required minimum fabrication size (minimum fabrication size for gate) is reduced to less than the level of the wavelength of light used for the lithography to bring about a difficulty in further refinement of fabrication.
In view of the above, as a means for increasing the operation speed of the n-type channel field effect transistor, a method of inducing strains to silicon in the channel portion of the field effect transistor has been proposed. It has been known so far that the electron mobility (effective mass) changes when silicon crystals are strained. Japanese Patent Laid-open No. 11-340337 discloses a method of using silicon-germanium of lager lattice constant than that of silicon for the underlying film forming the field effect transistor, and epitaxially growing a silicon layer thereover thereby providing silicon to be a channel portion with strains to enhance the mobility and increase the operation speed of the transistor.
However, when materials of different lattice constants of crystals are epitaxially grown under lattice matching as described above, the strain energy caused in the crystals increases to bring about a problem of including dislocation in the crystals at a film thickness greater than a certain critical thickness. Further, adoption of an additional production apparatus caused by the introduction of unusual material of silicon-germanium increases the cost in the production process of semiconductor devices such as LSI. Thus, the method described above has not yet been put to practical use.
Further, while the complementary field effect transistor comprises an n-type channel field effect transistor using electrons as carriers and an n-type channel field effect transistor using holes as carries, it is preferred to increase the operation speed for each of the n-type channel and p-type channel transistors in order to increase the operation speed of the semiconductor device.